Method of manufacturing a LDD transistor in a semiconductor devi

Details Method of manufacturing a LDD transistor in a semiconductor devi Method of manufacturing a LDD transistor in a semiconductor devi

1996-03-21

1997-10-28

Niebling, John

Fishing, trapping, and vermin destroying

437 45, 437164, H01L 21265

Patent

active

056817711

ABSTRACT:
This invention relates to a method of manufacturing a transistor which can form a junction having shallow junction depth and accomplish high trans conductance by forming a N.sup.+ region on a silicon substrate to suppress short channel effect and forming a P.sup.-- layer on the N.sup.+ region using a boron silicate glass layer(BSG) in manufacturing a p-type transistor.

REFERENCES:
patent: 5024959 (1991-06-01), Pfiester
patent: 5324686 (1994-06-01), Tsunashima
patent: 5338698 (1994-08-01), Subbamma
patent: 5340770 (1994-08-01), Allman et al.
patent: 5434440 (1995-07-01), Yoshitomi et al.
patent: 5512502 (1996-04-01), Ootsuka et al.

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