Method of fabricating a high capacitance insulated-gate field ef

Details Method of fabricating a high capacitance insulated-gate field ef Method of fabricating a high capacitance insulated-gate field ef

1995-06-06

1997-10-28

Bowers, Jr., Charles L.

Fishing, trapping, and vermin destroying

437 40, H01L 21265

Patent

active

056817690

ABSTRACT:
A high capacitance field effect transistor for use in an integrated memory circuit is fabricated with an optimized gate electrode and active region overlap, increasing the gate electrode to substrate capacitance thereby minimizing the effect of alpha particle upset. The optimized overlap is accomplished by maximizing the opening in the field oxide layer which defines the active region. In some embodiments, the transistor is also optimized for overall cell layout area.

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