Method for manufacturing thin film transistor

Fishing – trapping – and vermin destroying

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437 40TFT, 437 41TFT, 437164, 437233, H01L 21225, H01L 21336

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active

056817606

ABSTRACT:
A method for manufacturing a thin film transistor is disclosed. To solve the problems of leakage current generated at the grain boundary which passes through a source and a drain and the difficulty in obtaining stable device characteristic owing to the change of the lengths of the channel region and the offset region according to the degree of the overlay misalignment, the method includes the steps of forming a polysilicon layer on a substrate, forming an impurity-containing layer on the polysilicon layer, forming a prescribed pattern by patterning the impurity-containing layer, flowing the impurity-containing layer by heat treating, and crystallizing the polysilicon layer by annealing using a prescribed light source, wherein the flowed impurity-containing layer functions a lens during crystallizing the polysilicon layer to generate a partial temperature difference between the portion of the polysilicon layer where the impurity-containing layer is formed and the portion of the polysilicon layer where the impurity-containing layer is not formed.

REFERENCES:
patent: 4628589 (1986-12-01), Sundaresan
patent: 5162892 (1992-11-01), Hayashi et al.
patent: 5438014 (1995-08-01), Hashimoto
patent: 5541119 (1996-07-01), Kodama
Wolf et al., Silicon Processing for the VLSI Era, vol. 1: Process Technology, Lattice Press, 1986, pp. 57-58, 1986.

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