Chrominance processor control system

Details Chrominance processor control system Chrominance processor control system

1984-03-28

1986-09-09

Shepperd, John W.

Facsimile and static presentation processing

Static presentation processing

Attribute control

358 28, 358 19, H04N 964

Patent

active

046112405

ABSTRACT:
In a color TV receiver, a color AFPC loop, responsive to line rate synchronizing bursts of subcarrier frequency derived from the output of a first of a pair of cascaded chrominance signal amplifiers, controls the frequency and phase of an output of a VCO. The VCO output is passed through a variable phase shifter external to the AFPC loop to develop reference oscillations for use by color demodulators. Control of the variable phase shifter is effected by the output of a phase detector which compares the phases of (a) an output of the variable phase shifter and (b) line rate synchronizing bursts derived from an output of the second chrominance signal amplifier.

REFERENCES:
patent: 3679816 (1972-07-01), Avins et al.
patent: 4051519 (1977-09-01), Harwood
patent: 4130831 (1978-12-01), Isono et al.
patent: 4403244 (1983-09-01), Fujishima

Affiliated with

Also associated with

Rating

Chrominance processor control system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Chrominance processor control system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Chrominance processor control system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1018041