Shared use of keyboard and memory lines

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Details

3649256, 3649278, 364928, 364DIG2, G06F 1338

Patent

active

050653563

ABSTRACT:
The present invention describes a method and apparatus for interconnecting keyboard lines and memory lines to the same pins of a microprocessor or calculator chip. Resistors are placed in series with each keyboard line before interconnection to the memory lines and microprocessor pins to prevent disruption or degradation of the memory signal in the event a key on keyboard is depressed during a memory operation cycle. Means are provided to prevent memory operations during keyboard scan routines and means are provided to prevent keyboard scan routines from operating during memory operation cycles.

REFERENCES:
patent: 4021656 (1977-05-01), Caudel et al.
patent: 4333089 (1982-06-01), Leininger
patent: 4527250 (1985-07-01), Galdun et al.
patent: 4725816 (1988-02-01), Petterson

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