Metal-to-polysilicon capacitor and method for making the same

Details Metal-to-polysilicon capacitor and method for making the same Metal-to-polysilicon capacitor and method for making the same

1988-05-03

1991-11-12

Carroll, J.

357 235, 357 236, 357 41, 357 54, 357 67, H01L 2978, H01L 2702, H01L 2934, H01L 2348

Patent

active

050652206

ABSTRACT:
A metal-to-polysilicon capacitor, a floating-gate transistor containing such a capacitor, and a method for making the same is disclosed. The bottom plate of the capacitor is formed over a field oxide structure, and the multilevel dielectric is deposited thereover. The multilevel dielectric is removed from the capacitor area, and an oxide
itride dielectric is deposited over the exposed bottom plate and over the multilevel by way of LPCVD. A first layer of titanium/tungsten is preferably deposited prior to contact etch, and the contacts to moat and unrelated polysilicon are formed. Metallization is sputtered overall, and the metal and titanium/tungsten are cleared to leave the metallization filling the contact holes, and a capacitor having a titanium/tungsten and metal top plate.

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H. C. Card et al., "Reversible Floating-Gate Memory", Journal of Applied Physics, vol. 44, (May 1973), pp. 2326-2330.
G. G. Jambotkar et al., "Stacked Gate Device with Reduced O State Threshold Voltage", IBM Technical Disclosure Bulletin, vol. 22, (June 1979), pp. 160-161.

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