Patent
1990-06-22
1991-11-12
James, Andrew J.
357 236, 357 41, H01L 2710, H01L 2715, H01L 2978, H01L 2702
Patent
active
050652150
ABSTRACT:
A semiconductor memory includes a plurality of semiconductor memory cells formed in a matrix form on a semiconductor substrate, each semiconductor memory cell having a memory cell including a trench capacitor, a bit line, and a word line extending perpendicularly to the bit line. The word lines of semiconductor memory cells adjacent in a direction of the bit lines substantially vertically overlap each other. A method of manufacturing the above semiconductor memory includes the steps of forming a first word line of a given semiconductor memory cell, and forming a second word line of a semiconductor memory cell adjacent to the given semiconductor memory cell in a direction of the bit line on the first word line, so that the second word line overlaps the first word line in a substantially insulated state.
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patent: 4935791 (1990-06-01), Namaki
Stacked Capacitor Cells for High-Density Dynamic RAMs, by Hidehiro Watanabe, 1988 IEDM, pp. 600-603.
James Andrew J.
Meier Stephen D.
NEC Corporation
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