Integrated high-voltage bipolar power transistor and low voltage

Details Integrated high-voltage bipolar power transistor and low voltage Integrated high-voltage bipolar power transistor and low voltage

1988-12-21

1991-11-12

Wojciechowicz, Edward J.

357 234, 357 46, H01L 2702

Patent

active

050652133

ABSTRACT:
A description is given of two versions of an integrated structure in the emitter switching configuration comprising a high-voltage bipolar power transistor an a low-voltage MOS power transistor. In the vertical MOS version, the emitter region of the bipolar transistor is completely buried, partly in a first N-epitaxial layer and partly in a second N epitaxial layer; the MOS is located above the emitter region. The bipolar is thus completely buried active sturcture. In the horizontal MOS version, in a N-epitaxial layer there are two P+regions, the first, which constitutes the base of the bipolar transistor, receives the N+emitter region of the same transistor; the second receives two N+regions which constitute the MOS source and drain regions, respectively; the front of the chip is provided with metal plating to ensure the connection between the MOS drain and the bipolar emitter contacts.

REFERENCES:
patent: 4881119 (1989-11-01), Paxman et al.
patent: 4935799 (1990-06-01), Mori et al.

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