Process of making interconnection structure for semiconductor de

Metal working – Method of mechanical manufacture – Electrical device making

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174 685, H05K 330

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active

046481796

ABSTRACT:
A first level interconnection structure is fabricated by forming conductor patterns on the top surface of a thin flexible polymer film temporarily supported on a rigid thin ceramic or metal support member having windows therein. Via openings in the bottom surface of the polymer film are made to selected conductors, and the openings are filled with bonding metallurgy. The lower surface of the film is coated with a partially cured polyimide adhesive. The adhesive is removed in the via areas to expose the bonding metallurgy. This first layer structure is tested and then transferred to the ceramic substrate of a VSLI circuit interconnection module on which corresponding metal pads are formed for pad-to-pad contact. When pressure and heat are applied, there occurs simultaneous bonding of the metal pads on the substrate and of the film directly to the substrate. A second level interconnection structure is formed in the same manner and bonded to the top surface of the first level structure. Additional level structures may be similarily superimposed to form a multilayer interconnection structure. During bonding, the lamination of the layers occurs in such a way that a single solid film is formed with the conductors embedded therein. One or more integrated circuit chips may then be bonded by their contact pads to the conductors on the upper most level interconnection structure.

REFERENCES:
patent: 3264402 (1966-08-01), Shaheen et al.
patent: 3464855 (1969-09-01), Shaheen et al.
patent: 4445952 (1984-05-01), Reynold, III et al.
patent: 4449769 (1984-05-01), Kobayashi et al.
patent: 4496793 (1985-01-01), Hanson et al.
Adhesives Age, Jan., 1979, p. 35 by St. Clair et al.

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