Process for realizing the Viterbi-algorithm by means of parallel

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G06F 1110

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050420364

ABSTRACT:
A method for implementing the Viterbi algorithm (Viterbi decoder) for very high data rates/decoding rates. The trellis diagram (original trellis diagram) of the Markov process, the original trellis diagram being the basis of such implementation, is considered over a greater period. Transitions of the original trellis diagram are combined in one multi-step transition (multi-step trellis diagram) per each M. The number of transition branches, which rise exponentially, in such a process with M, is reduced to a smaller number by exploiting fundamental properties of the original trellis diagram forming the basis of the multi-step transitions. This eliminates non-optimal transition branches irrespective of the change from one multi-step transition to another. This permits the design of Viterbi decoders for very high data rates, as more time is available for executing the computing operations on number of computers as compared to the maximum permissible time for executing similar (identical) operations in the implementation of the Viterbi algorithm based on the one-step transition of the original trellis diagram.

REFERENCES:
patent: 3891959 (1975-06-01), Tsuji et al.
patent: 4583078 (1986-04-01), Shenoy et al.
patent: 4606027 (1986-08-01), Otani
patent: 4757506 (1988-07-01), Heichler
patent: 4847871 (1989-07-01), Matsushita et al.

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