Method of fabricating an integrated circuit with vertical bipola

Details Method of fabricating an integrated circuit with vertical bipola Method of fabricating an integrated circuit with vertical bipola

1995-05-31

1997-10-21

Nguyen, Tuan H.

Fishing, trapping, and vermin destroying

437 31, 437 77, 437917, 148DIG96, H01L 21265

Patent

active

056795874

ABSTRACT:
An integrated circuit containing both power and small-signal NPN bipolar devices. The small-signal devices use lateral current flow, and are completely surrounded (laterally and vertically) by an N-type well region. The N-type well region itself is completely surrounded (laterally and vertically) by a P-type isolation region. This double isolation provides improved protection against turn-on of parasitic devices, which can cause leakage problems in the conventional device structures. Optionally a self-aligned process step is used to provide a graded base doping profile in the small-signal devices.

REFERENCES:
patent: 4110126 (1978-08-01), Bergeron et al.
patent: 4721684 (1988-01-01), Musumeci
patent: 4898836 (1990-02-01), Zambrano et al.
patent: 4965215 (1990-10-01), Zambrano et al.
patent: 5246871 (1993-09-01), Zambrano et al.

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