Booth multiplication structure which selectively integrates the

Details Booth multiplication structure which selectively integrates the Booth multiplication structure which selectively integrates the

1998-06-19

2000-12-26

Mai, Tan V.

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

G06F 752

Patent

active

061674222

ABSTRACT:
A combination has a booth recoder with at least three input lines; two input lines corresponding to two bits of a multiplier and one input line being an increment select line. In one embodiment, signals representing the two bits of the multiplier are provided on the two input lines corresponding to the two bits. A controller selectively asserts a increment select signal on an increment select line, thereby incrementing the multiplier. Therefore, the present invention has the advantage of incrementing a multiplier while performing booth multiplication without requiring an additional adder for incrementing.

REFERENCES:
patent: 5485413 (1996-01-01), Kuboniwa
patent: 5677863 (1997-10-01), Naffziger
patent: 5892698 (1999-04-01), Naffziger

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