Method of making a capacitor with standard self-aligned gate pro

Details Method of making a capacitor with standard self-aligned gate pro Method of making a capacitor with standard self-aligned gate pro

1984-12-11

1986-02-25

Hearn, Brian E.

Metal working

Method of mechanical manufacture

Assembling or joining

29577C, 156653, 357 236, 357 51, 148DIG14, 148DIG51, H01L 2194, H01L 2702, H01L 2992

Patent

active

045718164

ABSTRACT:
A method of manufacturing a semiconductor device is disclosed wherein a matched capacitor having a relatively high capacitance is formed in the structure of a linear MOS device. The method utilizes the standard procedure for manufacturing MOS devices which includes two separate mask steps for forming contact openings to a field effect transistor. During the first mask step, the opening for the upper plate contact of the capacitor is fully etched while the opening for the lower plate contact is only partially etched. During the second mask step, the opening for the lower plate contact of the capacitor is fully etched to the lower plate. In this manner the existing standard procedure may be used without the addition of nonstandard mask and diffusion steps.

REFERENCES:
patent: 3408543 (1968-10-01), Ono et al.
patent: 3472712 (1966-10-01), Bower
patent: 3891190 (1975-06-01), Vadasz
patent: 4125933 (1978-11-01), Baldwin et al.
patent: 4135954 (1979-01-01), Chang et al.
patent: 4290186 (1981-09-01), Klein et al.
patent: 4377029 (1983-03-01), Ozawa
patent: 4413401 (1983-11-01), Klein et al.
patent: 4511911 (1985-04-01), Kenney

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