Vertical type semiconductor device and method for producing the

Details Vertical type semiconductor device and method for producing the Vertical type semiconductor device and method for producing the

1991-09-30

1993-10-05

Kunemund, Robert

Fishing, trapping, and vermin destroying

437 41, 437 27, 437 29, 437235, 148DIG126, 257342, 257339, 257401, H01L 21265

Patent

active

052504492

ABSTRACT:
The present invention has as an object the provision of a vertical type semiconductor device whereby miniaturization and lowered ON resistance of the cell can be achieved without impairing the functioning of the device.
The line width of the gate electrode is made smaller to meet the demand for miniaturization of the cell, but the distance between the channel regions diffused into the portions below the gate at the time of double diffusion is kept to be virtually equal to that in the device of larger cell size having a low J.sub.FET resistance component. Here, the reason for making the line width of the gate electrode smaller is for securing an area for the source contact.
The point is that, while the width of the gate electrode is set to be smaller, the mask members as the mask for double diffusion, having the width allowing the source region to diffuse to the portion under the gate, are attached to the side walls of the gate electrode.
Thereby, miniaturization and lowered ON resistance of the cell can be achieved without impairing the functioning of the device.

REFERENCES:
patent: 4672407 (1987-06-01), Nakagawa et al.
patent: 4879254 (1989-11-01), Tsuzuki et al.
patent: 4896199 (1990-01-01), Tsuzuki et al.
patent: 4904613 (1990-02-01), Coe et al.
patent: 4998151 (1991-03-01), Korman et al.
patent: 5031009 (1991-07-01), Fujihiri
Modeling of the On-Resistance of LDMOS, and VMOS Power Transistors, pp. 356-367, S. C. Sun et al., IEEE Electron Devices, vol. 27, No. 2 (date unknown).

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