Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1999-06-28

2000-12-26

Hoang, Huan

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36523003, G11C 800

Patent

active

061669865

ABSTRACT:
A semiconductor memory device decreases a layout area by reducing the number of input lines of input/output sense-amp (IOSA) enable logic. In a semiconductor memory device including m cell arrays on the basis of a word line, each of the m cell arrays being divided into n sub-cell blocks on the basis of a column line, the semiconductor memory device includes: a decoder which receives and decodes a plurality of column addresses coded by a gray code, and enables a local input/output sense-amp which is mounted to both sides of a corresponding sub-cell block among the n sub-cell blocks through the medium of a local input/output line, wherein the n sub-cell blocks are arranged in order of the gray code. As a result, the semiconductor memory device uses a small number of input lines as compared with the conventional input/output (IO) control enable logic, thereby decreasing a layout area as well as an area of an array control logic.

REFERENCES:
patent: 5084841 (1992-01-01), Williams et al.
patent: 5289428 (1994-02-01), Sato et al.
patent: 5497353 (1996-03-01), Sato et al.
patent: 5778415 (1998-07-01), Marietta et al.

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