4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Tokyo, Japan

Corporate Assignee

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Method and apparatus for symmetric-key encryption

Cryptography – Communication system using cryptography – Symmetric key cryptography
Reexamination Certificate

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Method and system for identifying failure point

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Processing unit for a computer and a computer system...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2004627

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