Rita M. Wisor

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Processor with decompressed video bus

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Processor with decompressed video bus

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Reverse data channel as a bandwidth modulator

Patent

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Side bus to dynamically off load main bus

Multiplex communications – Data flow congestion prevention or control – Flow control of data transmission through a network
Patent

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System for dynamically reconfiguring subbusses of data bus accor

Patent

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Profile ID: LFUS-PAI-P-139387

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