4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Orlando Davila

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JTAG boundary scan cell with enhanced testability feature

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for controlling access to shared...

Electrical computers and digital processing systems: virtual mac – Task management or control – Process scheduling
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Method and apparatus for controlling access to shared...

Electrical computers and digital processing systems: virtual mac – Task management or control – Process scheduling
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2081175

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