4. Error detection/correction and fault detection/recovery
  5. Data processing system error or fault handling
  6. Reliability and availability

Kent A. Dickey

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Circuit for allowing data return in dual-data formats

Electrical computers and digital processing systems: support – Reconfiguration
Reexamination Certificate

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Computer-system processor-to-memory-bus interface having repeati

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Memory address interleaving and offset bits for cell...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate

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Method and apparatus for causing computer system...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate

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Method for allowing distributed high performance coherent...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate

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Profile ID: LFUS-PAI-P-917449

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