4. Electronic digital logic circuitry
  5. Interface
  6. Logic level shifting

Joseph Gerard Petrofsky

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Method and system for improved phase noise in a BiCMOS clock...

Electronic digital logic circuitry – Interface – Logic level shifting
Reexamination Certificate

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RMS-to-DC converter with fault detection and recovery

Data processing: measuring – calibrating – or testing – Measurement system – Measured signal processing
Reexamination Certificate

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RMS-to-DC converter with fault detection and recovery

Data processing: measuring – calibrating – or testing – Measurement system – Measured signal processing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2156491

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