Joseph D. Kinkade

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Interprocessor messaging system

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Interval-timing facility using overbuilt hierarchical timing whe

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Counting – scheduling – or event timing
Patent

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Interval-timing facility using overbuilt hierarchical timing...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Counting – scheduling – or event timing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-1631469

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