4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Memory testing

Hsiu-Ying Hsu

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Structure and method of repairing SDRAM by generating...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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Structure of controlled pipeline logic

Electronic digital logic circuitry – Multifunctional or programmable – Sequential or with flip-flop
Reexamination Certificate

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System for reducing processor workloads with memory...

Electrical computers and digital data processing systems: input/ – Input/output data processing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2269775

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