4. Electrical computers and digital processing systems: memory
  5. Storage accessing and control
  6. Hierarchical memories

David J. Broniarczyk

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Communication link protocol optimized for storage architectures

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate

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Data storage system

Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data transfer regulating
Reexamination Certificate

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Method of communicating data in an interconnect system

Electrical computers and digital processing systems: multicomput – Multicomputer data transferring via shared memory – Accessing another computer's memory
Reissue Patent

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Method of communicating data in an interconnect system

Electrical computers and digital processing systems: multicomput – Multicomputer data transferring via shared memory – Accessing another computer's memory
Reexamination Certificate

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Node controller for a data storage system

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
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Profile ID: LFUS-PAI-P-1903315

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