4. Electrical computers and digital processing systems: memory
  5. Storage accessing and control
  6. Hierarchical memories

Brian Patrick Hanley

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Apparatus for cache use history encoding and decoding...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Method for implementing a pseudo least recent used (LRU)...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Programmable data prefetch pacing

Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2040607

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