PLL frequency synthesizer capable of changing an output frequenc

Oscillators – Automatic frequency stabilization using a phase or frequency... – Tuning compensation

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Details

331 8, 331 17, 331 25, H03L 7085

Patent

active

052472655

ABSTRACT:
In a frequency synthesizer, a first pulse removing circuit (31) is connected between a reference signal generator (21) and a phase-frequency comparator (24). A second pulse removing circuit (32) is connected between a variable frequency divider (23) and the phase-frequency comparator. Responsive to first removing data indicative of a first pulse number, the first pulse removing circuit removes pulses from the reference signal that are equal in number to the first pulse number for a first predetermined cycle to produce a first pulse removed signal. Responsive to second removing data indicative of a second pulse number, the second pulse removing circuit removes pulses from the divided signal that are equal in number to the second pulse number for a second predetermined cycle to produce a second pulse removed signal. Responsive to a current command, a current controlling circuit may control current supplied from/to a charge pump circuit (25). A control circuit may be connected between the phase-frequency comparator and the charge pump circuit. A switch may be inserted between the loop filter and the voltage controlled oscillator. When the switch switches off a PLL, a D/A converter supplies a control voltage to the voltage controlled oscillator and a filter capacitor of the loop filter. The charge pump circuit may comprise a control circuit, a constant current circuit, an integrating circuit, and a sample and hold circuit.

REFERENCES:
patent: 4568888 (1986-02-01), Kimura et al.

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