Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
307446, 307454, 307451, 307443, H03K 19092, H03K 1902
A Bi-CMOS logic gate circuit according to the present invention comprises a complementary Bi-CMOS output circuit at the output stage composed of a first-polarity bipolar transistor and a second-polarity bipolar transistor, and a level compensation circuit, provided between the input and output terminals of the Bi-CMOS output circuit, which compensates for each forward-bias voltage between the base and emitter of the first-polarity and second-polarity bipolar transistors. This arrangement allows the Bi-CMOS output circuit to swing the output voltage from the voltage of the high-voltage supply to that of the low-voltage supply at the output stage, previously smaller in the amplitude by the amount equal to the sum of the base-emitter voltage of two bipolar transistors.
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Kabushiki Kaisha Toshiba
Westin Edward P.
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