Accelerator processor for a data processing system

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G06F 1516




A special instruction processor that connects to a central processing unit in a data processing system. The central processing unit processes a number of instructions. Instructions involving operands first retrieve the operands from memory, from general purpose registers in the central processor or the instruction stream. These operands are transferred to the special instruction processor. If the instruction is one of a predetermined set of instructions that is executed by the special instruction processor, the special instruction processor will, upon receiving the operands, generate an overriding signal that alters the operation of the central processor unit by inhibiting its processing of the operands. Instead, the special instruction processor unit, that is specifically designed to perform the operations efficiently, computes a result. When the result has been computed and the central processor has determined the location for receiving the result, the central processing unit retrieves the result and stores it. Operations are optimized if the instruction operand specifiers designate operands that are to be found in the instruction stream or the general purpose registers.

patent: 3614740 (1971-10-01), Delagi
patent: 3614741 (1971-10-01), McFarland, Jr.
patent: 3701976 (1972-10-01), Shively
patent: 3710324 (1973-01-01), Cohen et al.
patent: 3787673 (1974-01-01), Watson
patent: 3871578 (1975-03-01), Van De Goor
patent: 3999163 (1976-12-01), Levy
patent: 4050058 (1977-09-01), Garlic
patent: 4064395 (1977-12-01), Schubeler
patent: 4101960 (1978-07-01), Stokes et al.
patent: 4110823 (1978-08-01), Cronshaw
patent: 4117536 (1978-09-01), Bodner


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