Multicell semiconductor memory device

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Details

357 236, 357 41, 357 45, 357 68, H01L 2348, H01L 2946, H01L 2954

Patent

active

051112752

ABSTRACT:
A semiconductor device is disclosed which connects a bit line via a bit line contact to cells in a dynamic access memory which are constructed of a transistor and capacitor. The semiconductor device includes a first conductive layer connected to the cell of a cell array via a bit line contact and a second conductive layer connected to the first conductive layer via a contact hole which is formed over the first conductive layer. By providing the first conductive layer between the bit line contact and the bit line, it is possible to increase a flat line width around a bit line contact and hence to adequately lower the bit line's resistance.

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