Method for producing PNP type lateral transistor separated from

Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step

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29576W, 29580, 148187, 156648, 156651, 156657, 156662, 357 35, H01L 21306, H01L 2972, B44C 122, C03C 1500

Patent

active

045226822

ABSTRACT:
The invention provides a unique sub-micron dimensioned PNP type transistor and method of making the same, wherein hundreds of such transistors may be fabricated on a single chip with each transistor comprising an active region surrounded by field oxide completely isolating it from the substrate and its effects on operation. Spaced apart slots made in the substrate permit the introduction of orientation dependent etching fluid therein to at least substantially etch semi-arrays of active regions of the substrate away from the substrate except for spaced apart supports therealong. Oxidation serves to support the semi-arrays and subsequent steps directly from the substrate or by webs of oxidation along the tops of the semi-arrays connected to the substrate. The support is necessary while orthogonal slots are provided permitting access to opposed sides of the active regions for doping P+ from each end, which P+ is driven in from both sides to provide an P+NP+ emitter base collector transistor active region to which electrical connections are applied using conventional techniques providing almost complete reduction of the parasitic capacitances and resistances because of the total oxide isolation of the active regions from the substrate.

REFERENCES:
patent: 3813585 (1974-05-01), Tarui et al.
patent: 4293373 (1981-10-01), Greenwood
patent: 4397075 (1983-08-01), Fatula et al.

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