Method for isolating faults on a clocked synchronous bus

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

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714 56, 714 34, 714798, G06F 1100

Patent

active

059548258

ABSTRACT:
A shift register is used to latch the bus-driver-enable signal for each potential bus driver during each system clock cycle. The shift register clock will freeze upon receipt of a "check stop" signal. Once frozen, the shift register can be scanned for fault isolation analysis.

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