Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2000-08-30
2002-06-11
Lebentritt, Michael S. (Department: 2824)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S151000, C438S154000
Reexamination Certificate
active
06403409
ABSTRACT:
FIELD OF THE INVENTION
The present invention is related to a thin film transistor and, more particularly, to a method for fabricating a top gate polysilicon type thin film transistor that can prevent a photoresist layer from burning.
BACKGROUND OF THE INVENTION
A thin film transistor liquid crystal display (hereinafter referred to as “TFT-LCD”) is an LCD having a TFT used for controlling the electric potential of a pixel electrode formed in all pixels of the LCD. The TFT is formed on a glass substrate using a semiconductor thin film such as silicon. Depending on the type of a silicon thin film, the TFT is generally classified into an amorphous silicon type and a polycrystalline silicon (polysilicon) type.
The amorphous silicon type TFT can be formed using a chemical vapor deposition (CVD) process at a temperature of 400° C. or less, which does not affect a glass substrate of an LCD panel. Having relatively low mobility of a charge carrier, the amorphous silicon type is not appropriate for a transistor used in a driver circuit that requires high operation speed for an active image and a good quality LCD. Therefore, in an amorphous silicon type TFT-LCD, a driver of the LCD panel is fabricated separately from the LCD panel and then attached to a peripheral region of the LCD panel. This increases production costs and the number of steps for fabricating an LCD.
On the other hand, having the relatively high mobility of a charge carrier, the polysilicon type used in a driver circuit for driving pixels in the LCD panel can be formed on a peripheral region of a glass substrate for a switching transistor in the pixels. This reduces the cost and the number of steps for fabricating an LCD.
In fabricating a polysilicon type TFT-LCD, additional processes are required to form a polysilicon layer on a glass substrate. That is, a re-crystallization step (e.g., laser beam scanning on an amorphous silicon layer) is required. Both an N-channel transistor and a P-channel transistor are used in an integrated circuit for driving an LCD to increase effectiveness of the integrated circuit. In order to form the N-channel transistor and the P-channel transistor on the same polysilicon layer, the total process of forming the transistors tends to be complicated. When a region of a certain impurity type transistor is treated by etching or ion implantation, a region of the other impurity type transistor may be covered with a protection layer. A photoresist can be used as a protection layer. In a step of implanting N-type impurity ions applied to an N-channel transistor, a region for a P-channel transistor may be covered with photoresist patterns.
If high energy ions are implanted into the polysilicon layer under the protection of a photoresist pattern, the kinetic energy of the implanted ions is changed into thermal energy and temperature of an overall substrate rises. The raised temperature damages the flatness of the glass substrate. In the ion-implanting step, the photoresist is burned (i.e., its characteristics change), it is called “photoresist burning”. Photoresist material changes by the photoresist burning, making it difficult to strip the photoresist pattern. This causes a particle problem and makes the LCD fabrication process more difficult.
The solubility change of photoresist in the stripper solution caused by pure heating is different from what is caused by the photoresist burning. Direct collision of high energy impurity ions against the photoresist material causes a photoresist burning problem. In order to resolve the photoresist burning problem, a few methods using an ion mask pattern made of other materials in lieu of a photoresist ion mask have been suggested. Because these methods, however, have their own problems, a method that can prevent the photoresist burning problem is required.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a method for fabricating a polysilicon type thin film transistor that can prevent a photoresist burning problem.
It is another object of the invention to provide a method for fabricating a polysilicon type thin film transistor that can prevent damage to the flatness of a glass substrate in an ion-implanting process.
It is further another object of the invention to provide a method for fabricating a polysilicon type thin film transistor that can reduce crystal structure destruction in a polysilicon layer during the high energy ion implantation and an annealing process for recovering the destruction thereof.
It is yet another object of the invention to provide a method for fabricating a polysilicon type thin film transistor that can simplify a total process by saving a photolithography process.
According to the present invention, there is provided a method for fabricating a top gate type polysilicon thin film transistor characterized by a step of implanting low energy ions. According to the method, a step of forming a photoresist pattern for patterning a gate is executed on a substrate that has a polycrystalline active pattern differentiated into each transistor region, a gate insulating layer formed on the active pattern, and a gate layer formed on the gate insulating layer. The substrate can usually be made by the consequent steps of forming a polycrystalline active pattern differentiated into each transistor region on a glass substrate, forming a gate insulating layer on the glass substrate that has the polycrystalline active pattern, and forming a gate layer on the gate insulating layer.
A step of etching the gate layer and the gate insulating layer follows. Usually, the step of etching the gate layer is performed by selectively etching the gate layer using a photoresist pattern corresponding to a gate pattern. The step of etching the gate insulating layer is performed under the protection of the same photoresist pattern. Then, low energy ions are implanted to form a source/drain region of a thin film transistor. In this case, the low energy has a rather relative meaning. However, the meaning can be confined to a certain level of energy by the designed depth of a doping region (i.e., the source/drain region). Because the gate insulating layer is absent in the source/drain region of a transistor, the low energy ions can be implanted. To form the photoresist pattern, a two-grade (or two-tone) exposure method can be used for saving a photolithographic step. The exposure may be done by a photo mask having a transparent region, a semitransparent region, and an opaque region. The semitransparent region may be replaced by the opaque region having many narrow transparent slits over the whole region.
A photoresist region corresponding to the semitransparent region is exposed to light of middle intensity. The light of middle intensity decomposes a molecular structure of the photoresist only in an upper portion of the photoresist layer, so that an upper portion of the photoresist region corresponding to the semitransparent region of the photo mask is removed in the following development process. The gate layer is isotropically etched under the protection of the photoresist gate pattern. In the isotropic etching, a peripheral region of the gate layer under the photoresist pattern is cut and removed. If a gate insulating layer is anisotropically etched using the same etching mask in the following process, the width of the gate insulating pattern is greater than that of the gate pattern. If the wider part of the gate insulating pattern serves as a mask for implanting the low energy ions, an undoped region covered by the wider part may serve as a lightly doped drain (LDD) region or an offset region.
As is described above, the most characteristic part of the invention is that the high energy ion implantation that causes the photo resist burning is replaced by the low energy ion implantation. The gate insulating layer is generally removed over the source/drain region. The invention premises that the driver IC having both an N-channel and P-channel transistors is formed on the peripheral region of the glass substrate with the switching transistor in the d
Lebentritt Michael S.
McGuireWoods LLP
Owens Beth E.
Samsung Electronics Co,. Ltd.
LandOfFree
Method for fabricating top gate type polycrystalline silicon... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating top gate type polycrystalline silicon..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating top gate type polycrystalline silicon... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2979847