Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-01-17
2006-01-17
Wilson, Christian D. (Department: 2891)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S643000, C438S687000
Reexamination Certificate
active
06987059
ABSTRACT:
A low resistance copper damascene interconnect structure is formed by providing a thin dielectric film such as SiC or SiOC formed on the sidewalls of the via and trench structures to function as a copper diffusion barrier layer. The dielectric copper diffusion barrier formed on the bottom of the trench structure is removed by anisotropic etching to expose patterned metal areas. The residual dielectric thus forms a dielectric diffusion barrier film on the sidewalls of the structure, and coupled with the metal diffusion barrier subsequently formed in the trench, creates a copper diffusion barrier to protect the bulk dielectric from copper leakage.
REFERENCES:
patent: 6555461 (2003-04-01), Woo et al.
patent: 6706629 (2004-03-01), Lin et al.
patent: 2002/0060363 (2002-05-01), Xi et al.
patent: 2004/0130035 (2004-07-01), Wu et al.
“Dual-Damascene: Overcoming Process Issues”, DeJule, Semiconductor International, Reed Electronics Group, Jun. 1, 2000.
Burke Peter A.
Lu Hongqiang
Sun Sey-Shing
Beyer Weaver & Thomas LLP
LSI Logic Corporation
Wilson Christian D.
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