Memory fault recovery system which executes degradation or recov

Details Memory fault recovery system which executes degradation or recov Memory fault recovery system which executes degradation or recov

1996-03-25

1997-05-13

Beausoliel, Jr., Robert W.

G06F 1100

Patent

active

056300441

ABSTRACT:
A system for memory fault recovery in an information processor has been described herein. When a fault recovery section detects a fault in a memory in each of logic units contained in the information processor, a fault memory control section searches a fault memory control table for identification information of the memory whose fault is detected, and gives instructions as to degradation of the memory specified by the memory identification information if the identification information of the detected memory is registered. A fault monitoring timer section measures a time elapsed since the registration of memory identification information in the fault memory control table and deletes identification information of a memory whose registration time period exceeds a prescribed time period.

REFERENCES:
patent: 4703481 (1987-10-01), Fremont
patent: 4740969 (1988-04-01), Fremont
patent: 5295258 (1994-03-01), Jewett et al.
patent: 5502728 (1996-03-01), Smith, III

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