Display unit and method of fabricating the same

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Including integrally formed optical element

Reexamination Certificate

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Details

C438S023000, C438S127000, C257S013000, C257S080000, C257S081000, C257S082000, C257S093000, C345S082000, C345S183000

Reexamination Certificate

active

06773943

ABSTRACT:

RELATED APPLICATION DATA
The present application claims priority to Japanese Patent Application No. P2001-067238 filed on Mar. 9, 2001, herein incorporated by reference.
BACKGROUND OF THE INVENTION
The present invention relates to a display unit and a method of fabricating the display unit. More specifically, the present invention relates to a display unit including a plurality of micro-sized semiconductor light emitting devices arrayed on a plane of a base body at intervals and a method of fabricating the display unit.
Display units of a type using light emitting diodes (LEDs) as a light emitting source, as shown in
FIG. 10
, are known.
FIG. 10
is a perspective view showing a rear side of an essential portion of one example of such related art display units. Referring to this figure, a display unit
100
is fabricated by two-dimensionally, densely arraying expensive LED modules
102
, the size of each of which is standardized into a relatively large value (for example, 5 mm square), on a plane
101
of a base body and fixing them thereon, and connecting an anode electrode
103
and a cathode electrode
104
of each of the LED modules
102
to wiring provided on the base body by wire bonding or soldering. This related art display unit
100
has the following problem. An LED chip having a size being usually about 0.3 mm square cut out of a compound semiconductor wafer is used for the LED module
102
per one pixel, and therefore, a large number of the compound semiconductor wafers are required to provide the LED chips used for several hundreds of thousands of pixels constituting the full-screen of the display unit
100
, with a result that the material cost is raised. Another problem of the related art display unit
100
is that since additional equipment and working steps are required for arraying and fixture of the LED modules and connection of the electrodes to wiring by wire bonding or soldering, the fabrication cost is essentially raised.
Each of the LED chips used for the related art display unit
100
has been usually of a planar type typically shown in
FIG. 11
, wherein a p-type semiconductor
106
having a p-electrode
107
and an n-type semiconductor
108
having an n-electrode
109
are stacked in a plane structure with an active layer
105
sandwiched therebetween. Light emitted from the active layer
105
is basically directed in omni-directions; however, due to a relationship between a relatively large refractive index of the semiconductor and an incident angle from the interior of the semiconductor to the interface (surface), light directed in the vertical direction is mainly emerged to the outside through the interface. As a result, there occur problems that the light emission efficiency in the downward direction is low even in consideration of the fact that the light directed upwardly (rear surface side) is reflected from an electrode plane or the like to the lower side (front surface side), and that the light emitted to the rear surface side is made incident on the adjacent LED module to cause bleeding in an image displayed on the display unit.
As one specific related art example, a display unit capable of reducing the cost and improving the reliability by using light emitting diodes buried in an insulating material has been disclosed in Japanese Patent Laid-open No. Sho 57-45583. The light emitting diode used in this display unit, however, is a light emitting diode chip having a planar structure cut out of a wafer, and an anode electrode and a cathode electrode have been mounted on each of the chips in the wafer state. Also, an epoxy resin used as an insulating layer to bury spaces among the light emitting diodes fixedly arrayed on a substrate is poured and cured such that the upper surface of the insulating layer is substantially at the same level as the upper end surfaces of the light emitting devices, and the upper surface of the insulating layer is smoothened by lapping or the like.
Japanese Patent Laid-open No. Hei 3-35568 has disclosed a light emitting diode having a small pn-junction region, wherein an upper end side of a semiconductor portion taken as an optical path over the pn-junction is cut into a truncated pyramid shape in order to significantly improve the rate of light emerged outwardly from the inside of the light emitting diode through the interface between the light emitting diode and an outer transparent plastic. The refractive index of the light emitting diode is greatly different from that of the transparent plastic around the light emitting diode. Accordingly, of light directed from a point light source to the interface, a light component entering the interface in the direction perpendicular to the interface, that is, at an incident angle of 0° and a light component having an incident angle smaller than a conical angle (for example, 27°) centered at the point light source pass through the interface; however, other light components each having a large incident angle are reflected from the interface and thereby impossible to be emerged outwardly from the inside of the light emitting diode, and are repeatedly reflected from the interface to be decayed. The cutting the upper end side of the semiconductor portion into the truncated pyramid shape is made to avoid such a phenomenon as much as possible.
Japanese Patent Laid-open No. Hei 11-75019 has disclosed a light source unit using light emitting diodes, wherein a tilt mirror tilted at 45° is provided at a position over a semiconductor chip as the light emitting diode. The mirror is provided for allowing light emitted upwardly from the light emitting diode to be reflected from the mirror at right angles, that is, toward the horizontal direction, and as such a mirror, there is used a dichroic mirror for reflecting light emitted from the light emitting diodes for emission of light of blue, green, and red onto the same optical axis.
SUMMARY OF THE INVENTION
The present invention provides a display unit fabricated at a low cost by arraying micro-sized semiconductor light emitting devices at intervals and simply fixing them thereon, and a method of fabricating the display unit. The present invention provides a display unit that includes semiconductor light emitting devices each of which is of a micro-size and has a sufficient luminance, and a method of fabricating the display unit.
According to an embodiment of the invention, there is provided a display unit including a plurality of semiconductor light emitting devices mounted in array on a plane of a base body. The semiconductor light emitting devices are fixedly arrayed on the plane of the base body at intervals in a state being buried in a first insulating layer or in a bare state being not buried in the first insulating layer; a second insulating layer is formed on the plane of the base body so as to cover the semiconductor light emitting devices; and an upper end side electrode and a lower end side of each of the semiconductor light emitting devices are extracted via connection holes formed in specific positions of the first insulating layer and the second insulating layer.
With this display unit, since the semiconductor light emitting devices are fixedly arrayed on the plane of the base body at intervals in a state being buried in the first insulating layer or in a bare state being not buried in the first insulating layer, and the electrodes of each of the semiconductor light emitting devices are extracted via the connection holes formed in the second insulating layer covering the semiconductor light emitting devices, it is possible to significantly reduce the cost per unit area of the display unit.
According to an embodiment of the invention, there is provided a display unit, wherein the semiconductor light emitting devices are fixedly arrayed on the plane of the base body in a state being buried in the first insulating layer except the upper end portions and the lower end portions of the semiconductor light emitting devices; the upper end side electrode and the lower end side electrode of each of the semiconductor light emitting devic

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