Memory device having terminals for transferring multiple...
Memory device having terminals for transferring multiple...
Memory device having terminals for transferring multiple...
Memory device having terminals for transferring multiple...
Memory device having terminals for transferring multiple...
Memory device having terminals for transferring multiple...
Memory device having two or more memory arrays and a testpath co
Memory device having two or more memory arrays and a testpath op
Memory device having valid bit storage units to be reset in batc
Memory device in which memory cells having complementary...
Memory device including combination SRAM-ROM cells and SRAM...
Memory device including parallel test circuit
Memory device including redundancy cells with programmable fuel
Memory device including two-valued/n-valued conversion unit
Memory device output buffer
Memory device output buffer
Memory device output circuit having multiple operating modes
Memory device performing write leveling operation
Memory device protected against undesirable supply voltage level
Memory device redundancy selection having test inputs