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Digital time delay circuit with high speed and large delay capac

Static information storage and retrieval – Read/write circuit – Signals
Patent

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Digital video memory

Static information storage and retrieval – Read/write circuit – With shift register
Patent

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DIGITAL-TO-ANALOG CONVERTER (DAC) FOR DYNAMIC ADJUSTMENT OF...

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate

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Digitally controlled delay applied to address decoder for write

Static information storage and retrieval – Read/write circuit – Signals
Patent

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Dimension programmable fusebanks and methods for making the same

Static information storage and retrieval – Read/write circuit – Bad bit
Patent

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Diode-based multiplexer

Static information storage and retrieval – Read/write circuit – Multiplexing
Reexamination Certificate

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Diode-FET logic circuitry

Static information storage and retrieval – Read/write circuit – Multiplexing
Patent

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Direct access to random redundant logic gates by using multiple

Static information storage and retrieval – Read/write circuit – Bad bit
Patent

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Direct bit line-bit line defect detection test mode for SRAM

Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate

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Direct memory access interface in integrated circuits

Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate

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Direct read of DRAM cell using high transfer ratio

Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate

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Direct sensing semiconductor memory device

Static information storage and retrieval – Read/write circuit – Differential sensing
Patent

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Directly-coupled and capacitively coupled nonvolatile static RAM

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing
Patent

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Directory memory system having simultaneous write and comparison

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent

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Directory memory system having simultaneous write, compare and b

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent

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Disabling a decoder for a defective element in an integrated cir

Static information storage and retrieval – Read/write circuit – Bad bit
Patent

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Disabling clocked standby mode based on device temperature

Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate

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Disabling sense amplifier

Static information storage and retrieval – Read/write circuit – Differential sensing
Patent

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Disabling sense amplifier

Static information storage and retrieval – Read/write circuit – Differential sensing
Patent

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Discharge circuit for a semiconductor memory including address t

Static information storage and retrieval – Read/write circuit – Accelerating charge or discharge
Patent

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