Semiconductor memory devices with delayed auto-precharge...

Semiconductor memory having a barrier transistor between a bit l

Semiconductor memory having a precharge voltage generation...

Semiconductor memory having an improved reading circuit

Semiconductor memory having bitline precharge circuit

Semiconductor memory having bitline precharge circuit

Semiconductor memory having hierarchical bit line structure

Semiconductor memory provided with data-line equalizing circuit

Semiconductor memory read/write access circuit and method

Semiconductor memory system, and access control method for...

Semiconductor memory testing apparatus

Semiconductor memory with auto-tracking bit line precharge schem

Semiconductor memory with boosted word line

Semiconductor memory with column decoded bit line equilibrate

Semiconductor memory with column equilibrate on change of data d

Semiconductor memory with column line voltage sitting circuit

Semiconductor memory with improved auto precharge

Semiconductor memory with selectively enabled precharge and sens

Semiconductor read only memory and a method for reading data sto

Semiconductor read only memory device