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Simple and systematic process for constructing and coding...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Simple decoding method and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Simple error-correction codes for data buffers

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Simple link protocol providing low overhead coding for LAN...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error detection for synchronization control
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Simplified branch metric and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Simplified branch metric for reducing the cost of a trellis...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Simplified decoding using structured and punctured LDPC codes

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Simplified high speed test system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Simplified message-passing decoder for low-density...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Simplified recovery of damaged frames in a communication link

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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Simplified RS (Reed-Solomon) code decoder that obviates...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Simplifying verification of an SFI converter by data format...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing
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Simulation device and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Skew detection correction
Patent

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Simultaneous AC logic self-test of multiple clock domains

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Simultaneous multiprocessor memory testing and initialization

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Simultaneous processing for error detection and P-parity and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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Simultaneous processing for error detection and P-parity ECC...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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Simultaneous switch test mode

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Simultaneous switch test mode

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Simultaneously driving a hardware device and a software...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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