Memory cell having a reduced active area and a memory array...
Memory cell having a second transistor for holding a charge...
Memory cell having a side electrode contact
Memory cell having a side electrode contact
Memory cell having a thin insulation collar and memory module
Memory cell having a vertical transistor with buried source/drai
Memory cell having a vertical transistor with buried...
Memory cell having a vertical transistor with buried...
Memory cell having a vertical transistor with buried...
Memory cell having active regions without N+ implants
Memory cell having bar-shaped storage node contact plugs and...
Memory cell having combination raised source and drain and...
Memory cell having conductive sill
Memory cell having enhanced high-K dielectric
Memory cell having enhanced high-K dielectric
Memory cell having first and second capacitors with...
Memory cell having improved interconnect
Memory cell having improved mechanical stability
Memory cell having trench capacitor and vertical, dual-gated...
Memory cell including stacked gate sidewall patterns and...