Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2003-06-06
2004-08-24
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257SE27104
Reexamination Certificate
active
06781177
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device equipped with a capacitor including a capacitor dielectric film made from a ferroelectric material or a high dielectric constant material and a method for fabricating the semiconductor device.
In accordance with recent development of digital technology, trend toward processing and storing massive data has been accelerated and electric equipment has attained higher performance. Therefore, semiconductor integrated circuit devices used in electronic equipment and semiconductor devices included in the semiconductor integrated circuit devices have rapidly been refined.
Accordingly, in order to increase the degree of integration of a semiconductor memory (a dynamic RAM), a technique to use a high dielectric constant film as a capacitor dielectric film instead of a conventional silicon oxide or silicon nitride film is now being widely studied and developed.
Also, in order to practically realize a nonvolatile RAM capable of more rapid write and read operations and a lower voltage operation than a conventional device, a technique to use, as a capacitor dielectric film, a ferroelectric film having a spontaneous polarization property is being earnestly studied.
In general, as materials for such a high dielectric constant film or a ferroelectric film, compounds having a bismuth-layer perovskite structure, such as barium strontium titanate, tantalum pentaoxide, lead zirconate titanate and bismuth strontium tantalum, are widely used.
Also, as a method for depositing a high dielectric constant film or a ferroelectric film, various methods including MOCVD (Metal Organic Chemical Vapor Deposition) are known. In any of these known methods, it is necessary to perform annealing in an oxygen atmosphere at a high temperature of approximately 600° C. through 800° C. after depositing a high dielectric constant film or a ferroelectric film, so as to crystallize the high dielectric constant film or the ferroelectric film.
On the other hand, as the memory cell structure of a DRAM or a nonvolatile RAM equipped with a capacitor including a high dielectric constant film or a ferroelectric film, a stacked memory cell structure has been proposed to meet the needs of a higher degree of integration of a semiconductor device. In the stacked memory cell structure, a transistor included in a memory cell is connected to a capacitor disposed above the transistor through a conducting contact plug. When the stacked memory cell structure is employed, the area of a memory cell can be reduced while keeping a large capacity necessary for storage, and hence, it is an indispensable structure for attaining a high degree of integration of a semiconductor device.
Now, a conventional semiconductor device having the stacked memory cell structure will be described with reference to FIG.
12
.
As shown in
FIG. 12
, in the conventional semiconductor device, an isolation region
11
and a pair of impurity diffusion layers
12
working as source and drain regions are formed in surface portions of a semiconductor substrate
10
. On the semiconductor substrate
10
between the pair of impurity diffusion layers
12
, a gate electrode
14
is formed with a gate insulating film
13
sandwiched between the gate electrode
14
and the semiconductor substrate
10
, and a sidewall
15
is formed on both sides of the gate insulating film
13
and the gate electrode
14
. The pair of impurity diffusion layers
12
, the gate insulating film
13
and the gate electrode
14
together form a transistor.
An interlayer insulating film
16
is formed so as to cover the transistor above the semiconductor substrate
10
. On the interlayer insulating film
16
, a first conducting barrier layer
18
having a function as an adhesion layer, a second conducting barrier layer
19
and a lower electrode
20
are successively formed, and an insulating film
21
of a silicon oxide film or a silicon nitride film is provided around the first conducting barrier layer
18
, the second conducting barrier layer
19
and the lower electrode
20
. On the lower electrode
20
and the insulating film
21
, a capacitor dielectric film
22
and an upper electrode
23
are successively formed, and the lower electrode
20
, the capacitor dielectric film
22
and the upper electrode
23
together form a capacitor.
A hydrogen barrier layer
24
having an insulating property is formed on the upper electrode
23
of the capacitor, and the first conducting barrier layer
18
and one of the pair of impurity diffusion layers
12
are electrically connected to each other through a conducting plug
25
formed in the interlayer insulating film
16
.
The first conducting barrier layer
18
is formed in order to prevent a material for the conducting plug
25
from diffusing into the capacitor and thus lowering the adhesion in annealing performed in an oxygen atmosphere for crystallizing the capacitor dielectric film
22
, and is made from a nitride material having a conducting property such as titanium nitride, tantalum nitride, titanium aluminum nitride or tantalum aluminum nitride.
The second conducting barrier layer
19
is formed in order to prevent contact resistance from increasing through oxidation of the first conducting barrier layer
18
or the conducting plug
25
by preventing oxygen from diffusing from above into the first conducting barrier layer
18
or the conducting plug
25
, and is made from a single film of any of or a multilayer film including iridium, iridium oxide, ruthenium and ruthenium oxide.
The interlayer insulating film
16
is made of a silicon oxide film including boron or phosphorus (hereinafter referred to as a BPSG film).
The aforementioned conventional semiconductor device has, however, the following two disadvantages:
In the conventional semiconductor device, the first conducting barrier layer
18
having a function as an adhesion layer is provided between the interlayer insulting film
16
and the second conducting barrier layer
19
. Therefore, adhesion between the first conducting barrier layer
18
and the second conducting barrier layer
19
can be secured, but adhesion between the first conducting barrier layer
18
and the interlayer insulating film
16
cannot be disadvantageously secured. Specifically, during the annealing performed at a high temperature in an oxygen atmosphere for crystallizing the capacitor dielectric film
22
, the interlayer insulating film
16
and the first conducting barrier layer
18
can be easily peeled off from each other, and therefore, adhesion between the interlayer insulating film
16
and the capacitor cannot be secured. The reason will now be described with reference to
FIGS. 13A and 13B
.
As shown in
FIG. 13A
, the side face of the first conducting barrier layer
18
is not covered with the second conducting barrier layer
19
. Therefore, when the annealing is performed at a temperature of 650° C. through 800° C. for crystallizing the capacitor dielectric film
22
, oxygen of the atmosphere diffuses into the first conducting barrier layer
18
, and hence, the first conducting barrier layer
18
is oxidized.
Since the first conducting barrier layer
18
has a characteristic to increase in its volume when oxidized, the thickness in a peripheral portion of the first conducting barrier layer
18
is increased as shown in FIG.
13
B. Therefore, adhesion between the center portion of the first conducting barrier layer
18
and the conducting plug
25
is lowered, and hence, adhesion between the capacitor and the conducting plug
25
is lowered. As a result, there arises a problem that the contact resistance between the capacitor and the conducting plug
25
is increased.
The second disadvantage is that the hydrogen barrier layer
24
having an insulating property cannot completely block hydrogen. The hydrogen barrier layer
24
is deposited by CVD or sputtering, and any hydrogen barrier layer
24
obtained by any of these methods cannot completely block hydrogen.
When the hydrogen barrier layer
24
is deposited by the CVD, a g
Ho Tu-Tu
Matsushita Electric - Industrial Co., Ltd.
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