Method for forming fully silicided gate electrode in a...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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Details

C438S682000, C438S592000, C438S655000

Reexamination Certificate

active

07659189

ABSTRACT:
A semiconductor MOS device includes a semiconductor substrate; a gate oxide layer disposed on the semiconductor substrate; a fully silicided gate electrode disposed on the gate oxide layer; a composite thin film interposed between the fully silicided gate electrode and the gate oxide layer; a spacer on sidewall of the fully silicided gate electrode; and a source/drain region implanted into the semiconductor substrate next to the spacer. A method for forming the semiconductor MOS device is disclosed.

REFERENCES:
patent: 6562717 (2003-05-01), Woo et al.
patent: 7235472 (2007-06-01), Klee et al.
patent: 2005/0282329 (2005-12-01), Li
patent: 2006/0011996 (2006-01-01), Wu et al.
patent: 2006/0228885 (2006-10-01), Saito

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