Display apparatus

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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C345S060000, C345S690000, C345S204000

Reexamination Certificate



A display apparatus in which one of periods of time of a plurality of subfields is sequentially designated within a display period of time of one field, one line is sequentially designated for the purpose of sequentially scanning all lines within the period of time of each subfield, data of one designated line in pixel data of one field stored in a field memory is read, the pixel data of each pixel of one line is individually converted into bit train data showing light emission or non-light emission of each of the plurality of subfields, each bit corresponding to the period of time of the designated subfield in the bit train data of each pixel of one line is generated in parallel, and a display panel is driven in accordance with the parallel output bits, the designated period of time of one subfield, and one designated line.

patent: 6052112 (2000-04-01), Tanaka et al.
patent: 6175194 (2001-01-01), Saegusa et al.
patent: 6483248 (2002-11-01), Nagakubo et al.
patent: 2000-259122 (2000-09-01), None


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