"D" Flip-flop

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons


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307291, H03K 3289




A "D" flip-flop circuit is disclosed which includes a master latch having data input transistors coupled to the input terminals thereof and data transfer transistors connected to the output thereof. A slave latch is connected to the output terminals of the data transfer transistors. The flip-flop circuit utilizes a resistive feedback network coupled between the emitter terminals of the transistors of the master latch to facilitate increased output voltages and stable predictable operating conditions. The data input transistors are connected as emitter follower circuits for driving the master latch transistors in a common base configuration for maximizing the speed-power product of the circuit.

patent: 3042815 (1962-07-01), Campbell, Jr.
patent: 3622810 (1971-11-01), Sasaki


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